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Implementation Techniques Logic Equations

Implementation is a technique for realizing a logic equation in the form of a logic circuit. Mechanical implementation very important role in the planning systems Diital. One of the goals to be achieved in the implementation of this technique is meralisasikan a logic equations by using the types of components that are widely available in the market as well as by taking into account the economic aspect and the response speed of the circuit.

The gates Nand and Nor have advantages compared with other logic gates for using Nand and Nor logic gates can be obtained functions And, Or, Ex-Or, and Not Ex-Nor gate. Writing logic equations can be done by two methods, namely the method of SOP (Sum Of Product) which refers to the logic 1 on output and method of POS (Product Of Sum), which refers to a logic 0 at the output.
1) Numerical representation of the equation SOP
Writing logic equations in the form SOP for equations that have the number of terms and variables that much is usually relatively long. The trick is to do a numerical representation.
Example:
F = A “B” C + A “BC + AB” C + ABC
Can be shortened to:
f (A, B, C) = Σ (1,3,5,7)

Where 1,3,5,7 decimal digits is a binary value of tribe A “B” C, A “BC, AB” C, and ABC. In an equation Sop, each tribe has a variable number of complete (represented by all the variables used are called minterm (abbreviated m)). To distinguish a minterm minterm of the other, each minterm given its own symbol, using lowercase m with subscript in accordance with its decimal value. For example minterm A “B” C given symbol m0; minterm A “BC given symbol m1, and others.

2) Numerical representation of the equation POS
Writing output logic equations in the form product of sum can also be simplified using the numeric representation of the way. You do this by finding the binary equivalent of each sukunyakemudian change the binary value of each tribe, and then change the value of the binary into decimal numbers.
Example:
F = (A + B + C). (A + B “+ C). (A” + B + C). (A “+ B” + C)
Shortened to:
f (A, B, C) = π (0,2,4,6)

Where the decimal digits 0 to replace parts (A + B + C) having a binary value 000; 2 decimal digits replace parts (A + B ‘+ C) having a binary value of 010; 4 decimal digits replace parts (A ‘+ B’ + C) having a binary 100; 6 decimal digits replace parts (A ‘+ B’ + C) having a binary 110. In a POS equation, each tribe has a variable number of complete (represented by variable digunkan) called maxterm (abbreviated M).

To distinguish a maxterm of maxterm another, each maxterm the symbol of its own, using a capital letter M with subscript in accordance with its decimal value. For example maxterm (A + B + C) given symbol M0; maxterm (A + B ‘+ C) by the symbol M1, etc.

3) Changing the equation SOP to POS and vice versa
Numeric representation can also be used to facilitate the change a logic equations of the form Sum Of Product (SOP) into a Product Of Sum (POS).
Example:
f (A, B, C) = A “B” C + A “BC” + AB “C + ABC

In a numeric representation, is written:
f (A, B, C) = m1 + m2 + m3 + m4
Or f (A, B, C) = Σ (1,2,5,7)

In the form of POS, can be written:
f (A, B, C) = π (0,3,4,6)
Or f (A, B, C) = M0.M3.M4.M6
Or f (A, B, C) = (A + B + C). (A + B ‘+ C’). (A “+ B + C). (A” + B “+ C)

In the example above, the equation SOP consists of three input variables A, B, C, thus there are 23 = 8 combinations of inputs (in decimal numbers: 0,1,2,3,4,5,6,7). In other words, there are as many as 8 minterm. In SOP above equation consists of only 4 pieces minterm (m1; m2; m5 and m7). Note that nagka-digit subscript is 1; 2; 5 and 7, the remaining numbers 0; 3; 4 and 6 will be a subscript to maxterm equation in the form of POS.
So,
f (A, B, C) = Σ (1,2,5,7) = π (0,3,4,6)
or,
f (A, B, C) = m1 + m2 + m5 + m7 = M0.M3.M4.M6

4) Implementation of SOP equation with Nand gate
An equation in the form of SOP can be implemented or realized only by using NAND gates. For example, for the SOP following equation:
F = AB + AC + BC

Implementation of the circuit is:
image

The circuit above can be replaced only by the use of NAND gate as follows:

5) Implementation of equation POS with gates Nor
Each output logic equations that are in the form of POS can be directly implemented using NOR gates. For example, below are deberikan a logical expression in the form of POS:
image
F = (A + B). (A “+ C)
The equation above can be implemented using several types of gate as follows:
image

However, the above equation can also be implemented only with menmggunakan NOR gates as follows:
image

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